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86: 87: #define IT0_IEN0 AINT(0x0000) /* RW ACPU interrupt enable 0 */ 88: #define IT0_IEN1 AINT(0x0004) /* RW ACPU interrupt enable 1 */
36: 37: #define IT0_IEN0 AINT(0x0000) /* RW ACPU enable interrupt 0 */ 38: #define IT0_IEN1 AINT(0x0004) /* RW ACPU enable interrupt 1 */