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193: /* wait until transmission is ready. */ 194: while ((IN(regLSTS) & LS_THRE) == 0); 195: 199: /* wait until the completion of transmission */ 200: while ((IN(regLSTS) & LS_THRE) == 0); 201: } 223: /* is there data in FIFO? */ 224: if ( !((sts = IN(regLSTS)) & (LS_DRDY | LS_RxERR))) { 225: if (scb->iptr != scb->optr) break; /* already received */ 231: /* receive data input */ 232: if (sts & LS_DRDY) c = IN(regDATA); 233: 274: /* initialize serial controller */ 275: IN(regLSTS); /* clear IS_LSTS */ 276: IN(regINTS); /* clear IS_SND */ 277: IN(regMSTS); /* clear IS_MSTS */ 278: