214: for (i = POLL_LIMIT; i > 0; i--) {
215: InW(BYTE_TEST); /* needs delay of 1 read */
216: if ((InW(reg) & mask) == val) goto fin0;
217: }
218: for (i = DLY_LIMIT; i > 0; i--) {
219: if (tk_dly_tsk(10) < E_OK) InW(BYTE_TEST);
220: if ((InW(reg) & mask) == val) goto fin0;
221: }
259:
260: return InW(MAC_CSR_DATA);
261: }
325:
326: return (InW(E2P_CMD) & E2P_CMD_TMO) ? -1 : InW(E2P_DATA);
327: }
336: /* D1(WOL), D2(Energy detect) -> D0(Normal operation) */
337: if (InW(PMT_CTRL) & PMT_CTRL_PM_MODE(3)) {
338: OutW(BYTE_TEST, BYTE_TEST_MAGIC); /* wake-up! */
396: wait_reg(inf, PMT_CTRL, PMT_CTRL_READY, PMT_CTRL_READY);
397: if (InW(HW_CFG) & HW_CFG_SRST_TO) inf->BadState = 1;
398: wait_srom(inf); // wait for EEPROM
413: #endif
414: InW(RX_DROP); /* RX Dropped Frame Counter: clear */
415:
470: for (; len > 7; len -= 4) {
471: *(UW *)bp = InW(RX_DATA);
472: bp += 4;
476: for (; len > 7; len -= 4) {
477: d = InW(RX_DATA);
478: *(UH *)bp = d;
485: for (; len > 7; len -= 4) {
486: d = InW(RX_DATA);
487: *bp++ = d;
496: if (len >= 4) {
497: d = InW(RX_DATA);
498: switch (len) {
507: /* read out CRC */
508: if (len) InW(RX_DATA);
509:
522: /* Get number of waiting status */
523: rxsused = (InW(RX_FIFO_INF) >> 16) & 0xff;
524:
526: for (i = 0; i < rxsused; i++) {
527: sts = InW(RX_STS);
528: len = (sts >> 16) & 0x3fff; /* size including CRC */
558: } else {
559: for (; len > 0; len--) InW(RX_DATA);
560: }
568: */
569: #define TXFIFOisReady ((InW(TX_FIFO_INF) & 0xffff) >= MAXPKTLEN + 8)
570:
579: /* Get number of waiting status */
580: txsused = (InW(TX_FIFO_INF) >> 16) & 0xff;
581:
583: for (i = 0; i < txsused; i++) {
584: sts = InW(TX_STS);
585: if (sts & TX_STS_ES) {
614: /* Get interrupt status */
615: sts = InW(INT_STS);
616: OutW(INT_STS, sts & ~inf->IntMask);
649: /* Wait for updating of interrupt status */
650: InW(BYTE_TEST);
651: }
732:
733: inf->stinf.overrun += InW(RX_DROP);
734:
741: */
742: if (!(InW(PMT_CTRL) & PMT_CTRL_READY) ||
743: InW(BYTE_TEST) != BYTE_TEST_MAGIC ||
744: inf->txbusy || ((InW(TX_FIFO_INF) >> 16) & 0xff) ||
745: (InW(TX_FIFO_INF) & 0xffff) < (TX_FIFO_SIZE * 1024 - 512) ||
746: (peek_mii(inf, 1, 2) != 0x0007)) {
776: /* Read EndianCheck register */
777: if (InW(BYTE_TEST) != BYTE_TEST_MAGIC) {
778: DP(("smsc9118_probe: LAN911x not found\n"));
799: /* Set controller chip name */
800: inf->ChipID = InW(ID_REV);
801: DP(("smsc9118_probe: ID_REV %#x\n", inf->ChipID));