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77: { 78: out_w(SPn_MODE(ch), SPIMode[ch]); 79: out_w(SPn_TIECS(ch), 0x000f); // CS: control by SPn_POL
66: { 67: out_w(SPn_MODE(SP0), 0x2700); // 8bit, CS0, Master, CPU mode 68: out_w(SPn_TIECS(SP0), 0x000f); // CS0: follow the specification by SPn_POL