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36: #define ADC_SMPR2(x) (ba[x] + ADCx_SMPR2) // Sampling time register 2 37: #define ADC_SQR1(x) (ba[x] + ADCx_SQR1) // Regular sequence register 38: #define ADC_DR(x) (ba[x] + ADCx_DR) // Regular data register