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99: #define GICD_ISENABLER(n) (GICD_BASE + 0x0100 + (0x04*(n))) /* Interrupt Set-Enable Registers */ 100: #define GICD_ICENABLER(n) (GICD_BASE + 0x0180 + (0x04*(n))) /* Interrupt Clear-Enable Registers */ 101: #define GICD_ISPENDR(n) (GICD_BASE + 0x0200 + (0x04*(n))) /* Interrupt Set-Pending Registers */