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106: #define GICD_ITARGETR(n) (GICD_BASE + 0x0800 + (0x04*(n))) /* Interrupt Processor Targets Registersi */ 107: #define GICD_ICFGR(n) (GICD_BASE + 0x0C00 + (0x04*(n))) /* Interrupt Configuration Registers */ 108: #define GICD_PPISR (GICD_BASE + 0x0D00) /* Private Peripheral Interrupt Status Register */