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44: #define PSR_M(n) ( n ) /* processor mode 0-31 */ 45: #define PSR_USR PSR_M(16) /* user mode */ 46: #define PSR_FIQ PSR_M(17) /* fast interrupt(FIQ) mode */
207: ssp->ip = regs->r[12]; 208: if ( (cpsr & PSR_M(31)) == PSR_SVC ) { 209: ssp->lr_svc = regs->lr;
188: // obtain mode 189: switch(regStack[ixCPSR] & PSR_M(31)) { 190: case PSR_USR: