63: unit = DEV_ADC_3;
64: } else if( in_w(ADC_ISR(DEV_ADC_1))) {
65: unit = DEV_ADC_1;
66: } else if( in_w(ADC_ISR(DEV_ADC_2))) {
67: unit = DEV_ADC_2;
113: }
114: *buf++ = in_w(ADC_DR(unit)); // Read deta
115: }
161: out_w(ADC_CR(unit), ADC_CR_ADDIS); // Set ADDIS
162: while(in_w(ADC_ISR(unit)) & ADC_ISR_ADRDY); // Wait until ADEN is clear
163: }
223: }
224: ccipr = in_w(RCC_CCIPR) & ~RCC_CCIPR_ADCSEL;
225: out_w(RCC_CCIPR, ccipr | (DEVCNF_ADCSEL << 28));
246: out_w(ADC_CR(unit), ADC_CR_ADVREGEN | ADC_CR_ADCAL); // ADCAL = 1
247: while( in_w(ADC_CR(unit)) & ADC_CR_ADCAL); // Wait until ADCAL is clear
248: