100: if(p_cb->rdat_num == 1) {
101: out_w(ba[unit] + I2C_SBIxCR1,
102: I2C_SBIxCR1_INIT & ~I2C_SBIxCR1_ACK);
109: if(p_cb->rdat_num == 1) {
110: out_w(ba[unit] + I2C_SBIxCR1,
111: I2C_SBIxCR1_INIT & ~I2C_SBIxCR1_ACK);
124:
125: out_w(ba[unit] + I2C_SBIxDBR, *p_cb->sbuf++);
126: if(--(p_cb->sdat_num) <= 0) {
135: case I2C_STS_RESTART:
136: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_RESTART);
137: if(p_cb->wait_tskid) {
144: stop:
145: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_STOP);
146: if(p_cb->wait_tskid) {
189: DI(imask);
190: out_w(ba[unit] + I2C_SBIxCR1, I2C_SBIxCR1_INIT);
191: if(p_cb->sdat_num > 0 ) { /* Send */
192: out_w(ba[unit] + I2C_SBIxDBR, p_cb->sadr);
193: p_cb->state = I2C_STS_SEND;
194: } else { /* Receive */
195: out_w(ba[unit] + I2C_SBIxDBR, (p_cb->sadr|1));
196: p_cb->state = I2C_STS_RECV | I2C_STS_TOP;
197: }
198: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_START);
199: EI(imask);
214: DI(imask);
215: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_STOP);
216: EI(imask);
245: /* I2C Device reset */
246: out_w(ba[unit] + I2C_SBIxCR0, I2C_SBIxCR0_SBIEN);
247: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_SBIM_I2C | I2C_SBIxCR2_SWRST(2));
248: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_SBIM_I2C | I2C_SBIxCR2_SWRST(1));
249: while ( (in_w(ba[unit] + I2C_SBIxCR1) & I2C_SBIxCR1_SWRMON) == 0 );
251: /* I2C Initial setting */
252: out_w(ba[unit] + I2C_SBIxCR1, I2C_SBIxCR1_INIT | ll_devinit[unit].sck);
253: out_w(ba[unit] + I2C_SBIxCR2, I2C_SBIxCR2_STOP);
254: out_w(ba[unit] + I2C_SBIxBR0, 0);
255: