95:
96: #define GIO_IIA(b) GIO(b,0x0014) /* RW enable interrupt status */
97: #define GIO_IEN(b) GIO(b,0x0018) /* -W enable interrupt */
98: #define GIO_IDS(b) GIO(b,0x001C) /* -W disable interrupt */
99: #define GIO_IIM(b) GIO(b,0x001C) /* R- enable interrupt state */
100: #define GIO_RAW(b) GIO(b,0x0020) /* R- interrupt Raw status */
101: #define GIO_MST(b) GIO(b,0x0024) /* R- interrupt mask / status */
102: #define GIO_IIR(b) GIO(b,0x0028) /* -W reset the cause of interrupt */
103: #define GIO_GSW(b) GIO(b,0x003C) /* RW connected to GIO_INT_FIQ pin */
104: #define GIO_IDT(n,b) GIO(b,0x0100+(n)*4) /* RW interrupt detection method 0-3 */
105: #define GIO_RAWBL(b) GIO(b,0x0110) /* R- edge-triggered interrupt status L */
106: #define GIO_RAWBH(b) GIO(b,0x0114) /* R- edge-triggered interrupt status H */
107: #define GIO_IRBL(b) GIO(b,0x0118) /* -W clear the cause of edge-triggered interrupt L */
108: #define GIO_IRBH(b) GIO(b,0x011C) /* -W clear the cause of edge-triggered interrupt H */
109: