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36: *PAGETBL_BASE = 0x9402; // Strongly-order, Kernel/RO 37: DSB(); 38: Asm("mcr p15, 0, %0, cr8, cr7, 0":: "r"(0)); // I/D TLB invalidate 39: Asm("mcr p15, 0, %0, cr7, cr5, 6":: "r"(0)); // invalidate BTC 40: DSB(); 41: ISB();