124: waitUsec(1);
125: if ((in_w(addr) & mask) == value) break;
126: }
164: /* generate start condition */
165: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) & ~IICC_ACKE);
166: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) | IICC_STT);
167:
177: /* error check */
178: sts = in_w(IIC_IICSE(IIC2));
179: if ((sts & IICSE_ALD) || !(sts & IICSE_ACKD)) {
194: /* generate stop condition */
195: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) | IICC_SPT);
196:
214: /* NAK check */
215: sts = in_w(IIC_IICSE(IIC2));
216: if (!(sts & IICSE_ACKD)) {
232: if (attr & IIC_TOPDATA) {
233: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) & ~IICC_WTIM);
234: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) | IICC_ACKE);
235: }
237: /* instruct the reception of data */
238: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) | IICC_WREL);
239: er = wait_int();
242: /* read data */
243: er = in_w(IIC_IIC(IIC2)) & 0xff;
244: fin0:
246: if ((attr & IIC_LASTDATA) || er < E_OK) {
247: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) | IICC_WTIM);
248: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) & ~IICC_ACKE);
249: out_w(IIC_IICC(IIC2), in_w(IIC_IICC(IIC2)) | IICC_WREL);
250: wait_int();
334: /* check abort switch */
335: if (in_w(GIO_I(GIO_L)) & 0x00000100) d |= SW_ABT;
336: