mtkernel_3/device/adc/sysdepend/stm32l4/adc_cnf_stm32l4.h | bare source | permlink (0.01 seconds) |
1: /* 2: *---------------------------------------------------------------------- 3: * Device Driver for micro T-Kernel for μT-Kernel 3.00.03 4: * 5: * Copyright (C) 2021 by Ken Sakamura. 6: * This software is distributed under the T-License 2.2. 7: *---------------------------------------------------------------------- 8: * 9: * Released by TRON Forum(http://www.tron.org) at 2021/03/31. 10: * 11: *---------------------------------------------------------------------- 12: */ 13: 14: 15: /* 16: * adc_cnf_stm32l4.h 17: * A/D converter device driver configuration file 18: * for TX03_M367 (STM32L4) 19: */ 20: #ifndef __DEV_ADC_CNF_STM32L4_H__ 21: #define __DEV_ADC_CNF_STM32L4_H__ 22: 23: /* Device initialization */ 24: #define DEVCONF_ADC_INIT_MCLK TRUE // Initialize module clock 25: 26: /* ADC Clock (RCC) */ 27: #define DEVCNF_ADCSEL 1 // ADC clock source 28: 29: /* Device control data */ 30: /* Common */ 31: #define DEVCNF_ADC_CKMODE 0 // ADC clock mode 32: #define DEVCNF_ADC_PRESC 0 // ADC prescaler 33: 34: /* ADC1 */ 35: #define DEVCONF_ADC1_SMPR1 0x00000000 // Sampling time (ADC_SMPR1 initial value) 36: #define DEVCONF_ADC1_SMPR2 0x00000000 // Sampling time (ADC_SMPR2 initial value) 37: 38: /* ADC2 */ 39: #define DEVCONF_ADC2_SMPR1 0x00000000 // Sampling time (ADC_SMPR1 initial value) 40: #define DEVCONF_ADC2_SMPR2 0x00000000 // Sampling time (ADC_SMPR2 initial value) 41: 42: /* ADC3 */ 43: #define DEVCONF_ADC3_SMPR1 0x00000000 // Sampling time (ADC_SMPR1 initial value) 44: #define DEVCONF_ADC3_SMPR2 0x00000000 // Sampling time (ADC_SMPR2 initial value) 45: 46: /* Interrupt t priority */ 47: #define DEVCNF_ADC12_INTPRI 5 48: #define DEVCNF_ADC3_INTPRI 5 49: 50: /* A/D conversion timeout time */ 51: #define DEVCNF_ADC_TMOSCAN 1000 52: 53: #endif /* __DEV_ADC_CNF_STM32L4_H__ */