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mtkernel_3/device/i2c/sysdepend/rx231/i2c_rx231.hbare sourcepermlink (0.03 seconds)

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    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    Device Driver for micro T-Kernel
    4:  *
    5:  *    Copyright (C) 2020-2021 by Ken Sakamura.
    6:  *    This software is distributed under the T-License 2.2.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by TRON Forum(http://www.tron.org) at 2021/03/31.
   10:  *
   11:  *----------------------------------------------------------------------
   12:  */
   13: 
   14: /*
   15:  *      i2c_rx231.h
   16:  *      I2C device driver
   17:  *      System-dependent definition for RX231
   18:  */
   19: 
   20: #ifndef __DEV_I2C_RX231_H__
   21: #define __DEV_I2C_RX231_H__
   22: 
   23: #define DEV_I2C_UNITNM          (1)     /* Number of devive units */
   24: 
   25: /* I2C device driver operating state */
   26: #define I2C_STS_START           0x0000
   27: #define I2C_STS_RESTART         0x0001
   28: #define I2C_STS_STOP            0x0003
   29: #define I2C_STS_SEND            0x0004
   30: #define I2C_STS_RECV            0x0005
   31: #define I2C_STS_TOP             0x8000
   32: #define I2C_STS_LAST            0x0800
   33: 
   34: /*----------------------------------------------------------------------
   35:  * RIIC registers
   36:  */
   37: #define RIIC_BASE               0x00088300
   38: 
   39: #define RIIC_ICCR1              (RIIC_BASE+0x00)    /* I2C bus cintrol reg. 1 */
   40: #define RIIC_ICCR2              (RIIC_BASE+0x01)    /* I2C bus cintrol reg. 2 */
   41: #define RIIC_ICMR1              (RIIC_BASE+0x02)    /* I2C bus mode reg. 1 */
   42: #define RIIC_ICMR2              (RIIC_BASE+0x03)    /* I2C bus mode reg. 2 */
   43: #define RIIC_ICMR3              (RIIC_BASE+0x04)    /* I2C bus mode reg. 3 */
   44: #define RIIC_ICFER              (RIIC_BASE+0x05)    /* I2C bus function enable reg */
   45: #define RIIC_ICSER              (RIIC_BASE+0x06)    /* I2C bus Status enable reg. */
   46: #define RIIC_ICIER              (RIIC_BASE+0x07)    /* I2C bus Interrupt enable reg. */
   47: #define RIIC_ICSR1              (RIIC_BASE+0x08)    /* I2C bus Status reg. 1 */
   48: #define RIIC_ICSR2              (RIIC_BASE+0x09)    /* I2C bus Status reg. 2 */
   49: 
   50: #define RIIC_SARL(y)            (RIIC_BASE+0x0A+(y<<1))   /* Slave address reg. L0~2 */
   51: #define RIIC_SARU(y)            (RIIC_BASE+0x0B+(y<<1))   /* Slave address reg. U0~2 */
   52: 
   53: #define RIIC_ICBRL              (RIIC_BASE+ 0x10)   /* I2C bus bit rate Low reg. */
   54: #define RIIC_ICBRH              (RIIC_BASE+ 0x11)   /* I2C bus bit rate High reg. */
   55: #define RIIC_ICDRT              (RIIC_BASE+ 0x12)   /* I2C bus transmit data reg. */
   56: #define RIIC_ICDRR              (RIIC_BASE+ 0x13)   /* I2C bus receive data reg. */
   57: 
   58: #define RIIC_ICCR1_ICE          (1<<7)  
   59: #define RIIC_ICCR1_IICRST       (1<<6)
   60: #define RIIC_ICCR1_SOWP         (1<<4)
   61: 
   62: #define RIIC_IICR2_BBSY         (1<<7)
   63: #define RIIC_IICR2_ST           (1<<1)
   64: #define RIIC_IICR2_RS           (1<<2)
   65: #define RIIC_IICR2_SP           (1<<3)
   66: 
   67: #define RIIC_ICMR3_WAIT         (1<<6)
   68: #define RIIC_ICMR3_ACKWP        (1<<4)
   69: #define RIIC_ICMR3_ACKBT        (1<<3)
   70: 
   71: #define RIIC_ICIER_TIE          (1<<7)
   72: #define RIIC_ICIER_TEIE         (1<<6)
   73: #define RIIC_ICIER_RIE          (1<<5)
   74: #define RIIC_ICIER_NAKIE        (1<<4)
   75: #define RIIC_ICIER_SPIE         (1<<3)
   76: #define RIIC_ICIER_STIE         (1<<2)
   77: #define RIIC_ICIER_ALIE         (1<<1)
   78: #define RIIC_ICIER_TMOIE        (1<<0)
   79: 
   80: #define RIIC_ICSR2_TDRE         (1<<7)
   81: #define RIIC_ICSR2_TEND         (1<<6)
   82: #define RIIC_ICSR2_RDRF         (1<<5)
   83: #define RIIC_ICSR2_NACKF        (1<<4)
   84: #define RIIC_ICSR2_STOP         (1<<3)
   85: #define RIIC_ICSR2_START        (1<<2)
   86: #define RIIC_ICSR2_AL           (1<<1)
   87: #define RIIC_ICSR2_TMOF         (1<<0)
   88: 
   89: 
   90: /* Register initial value */
   91: #define RIIC_ICMR1_INI          (1<<4)
   92: #define RIIC_ICBRH_INI          (14-1)
   93: #define RIIC_ICBRL_INI          (21-1)
   94: 
   95: /* 
   96:  * I2C interrupt number
   97:   */
   98: #define INTNO_RIIC_EEI          246
   99: #define INTNO_RIIC_RXI          247
  100: #define INTNO_RIIC_TXI          248
  101: #define INTNO_RIIC_TEI          249
  102: 
  103: 
  104: 
  105: #endif          /* __DEV_I2C_RX231_H__ */