gonzui

    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    micro T-Kernel 3.00.03
    4:  *
    5:  *    Copyright (C) 2006-2021 by Ken Sakamura.
    6:  *    This software is distributed under the T-License 2.2.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by TRON Forum(http://www.tron.org) at 2021/03/31.
   10:  *
   11:  *----------------------------------------------------------------------
   12:  */
   13: 
   14: /*
   15:  *      syslib.h
   16:  *
   17:  *      micro T-Kernel System Library  (TX03M367 depended)
   18:  */
   19: 
   20: #ifndef __TK_SYSLIB_CPU_DEPEND_H__
   21: #define __TK_SYSLIB_CPU_DEPEND_H__
   22: 
   23: #include "../core/armv7m/syslib.h"
   24: 
   25: /* ------------------------------------------------------------------------ */
   26: /*
   27:  * Interrupt number
   28:  */
   29: #define M367_INT0               0
   30: #define M367_INT1               1
   31: #define M367_INT2               2
   32: #define M367_INT3               3
   33: #define M367_INT4               4
   34: #define M367_INT5               5
   35: #define M367_INT6               6
   36: #define M367_INT7               7
   37: #define M367_INT8               8
   38: #define M367_INT9               9
   39: #define M367_INTA               10
   40: #define M367_INTB               11
   41: #define M367_INTC               12
   42: #define M367_INTD               13
   43: #define M367_INTUSBWKUP         34
   44: #define M367_INTRMCRX           74
   45: #define M367_INTRTC             99
   46: 
   47: /* ------------------------------------------------------------------------ */
   48: /*
   49:  * Interrupt mode ( SetIntMode )
   50:  */
   51: #define IM_LEVEL        0x0002         /* Level trigger */
   52: #define IM_EDGE         0x0000         /* Edge trigger */
   53: #define IM_HI           0x0000           /* H level/Interrupt at rising edge */
   54: #define IM_LOW          0x0001          /* L level/Interrupt at falling edge */
   55: 
   56: 
   57: /* ------------------------------------------------------------------------ */
   58: /*
   59:  * I/O port access
   60:  *      for memory mapped I/O
   61:  */
   62: Inline void out_w( UW port, UW data )
   63: {
   64:         *(_UW*)port = data;
   65: }
   66: Inline void out_h( UW port, UH data )
   67: {
   68:         *(_UH*)port = data;
   69: }
   70: Inline void out_b( UW port, UB data )
   71: {
   72:         *(_UB*)port = data;
   73: }
   74: 
   75: Inline UW in_w( UW port )
   76: {
   77:         return *(_UW*)port;
   78: }
   79: Inline UH in_h( UW port )
   80: {
   81:         return *(_UH*)port;
   82: }
   83: Inline UB in_b( UW port )
   84: {
   85:         return *(_UB*)port;
   86: }
   87: 
   88: #endif /* __TK_SYSLIB_DEPEND_H__ */