1: /*
2: *----------------------------------------------------------------------
3: * micro T-Kernel 3.00.05
4: *
5: * Copyright (C) 2006-2021 by Ken Sakamura.
6: * This software is distributed under the T-License 2.2.
7: *----------------------------------------------------------------------
8: *
9: * Released by TRON Forum(http://www.tron.org) at 2021/11.
10: *
11: *----------------------------------------------------------------------
12: */
13:
14: #include <sys/machine.h>
15: #ifdef CPU_CORE_ARMV7A
16:
17: /*
18: * int_asm.S (ARMv7-A)
19: * Interrupt control assembler routine
20: */
21:
22: #define _in_asm_source_
23: #include <sys/sysdef.h>
24: #include <sys/knldef.h>
25:
26: /* ------------------------------------------------------------------------ */
27: /*
28: * High level programming language routine for interrupt handler
29: * Called by interrupt entry routine.
30: *
31: * input : r0 : Vector number
32: * stack image
33: * Low Address +---------------+
34: * sp -> | R0 |
35: * | R1 |
36: * | R2 |
37: * | R3 |
38: * | R12(ip) |
39: * | R14_svc(lr) |
40: * | R14_xxx(lr) | Return address (pc)
41: * | SPSR_xxx |
42: * High Address +---------------+
43: */
44: .text
45: .balign 4
46: .arm
47: .globl Csym(knl_hll_inthdr)
48: .type Csym(knl_hll_inthdr), %function
49:
50: Csym(knl_hll_inthdr):
51: // enter Task independent part
52: ldr ip, =Csym(knl_taskindp)
53: ldr r2, [ip]
54: add r2, r2, #1
55: str r2, [ip] // knl_taskindp++
56:
57: cmp r2, #1 // 1st interrupt ?
58: bne not_1st_hllint // no => jump
59:
60: mov r2, sp // r2 <- task SP
61: ldr sp, =__irq_stack_start // switch to handler stack
62:
63: #if USE_FPU & INTHDR_DIS_FPU
64: fmrx r1, fpexc // r1: fpexc
65: bic ip, r1, #0x40000000 // disable VFP
66: fmxr fpexc, ip
67: #endif /* USE_FPU */
68:
69: push {r1, r2} // save fpexc & task SP
70:
71: not_1st_hllint: // call knl_hll_inthdr_tbl[n](intno)
72: ldr ip, =Csym(knl_hll_inthdr_tbl)
73: ldr ip, [ip, r3, lsl #2]
74: blx ip
75:
76: b Csym(knl_return_inthdr)
77:
78:
79:
80: /* ------------------------------------------------------------------------
81: * Return Interrupt Handler
82: */
83: .global Csym(knl_return_inthdr)
84: .type Csym(knl_return_inthdr), %function
85:
86: Csym(knl_return_inthdr):
87: cpsid ia // disable interrupt
88:
89: ldr ip, =Csym(knl_taskindp)
90: ldr r2, [ip]
91: sub r2, r2, #1
92: str r2, [ip] // knl_taskindp--
93:
94: cmp r2, #0 // 1st interrupt ?
95: bne return_inthdr_end // no => jump
96:
97: pop {r1, r2}
98: mov sp, r2 // restore task SP
99:
100: #if USE_FPU & INTHDR_DIS_FPU
101: fmxr fpexc, r1 // restore fpexc
102: #endif /* USE_FPU */
103:
104: // Dispatch disabled?
105: ldr ip, =Csym(knl_dispatch_disabled)
106: ldr r2, [ip]
107: cmp r2, #0
108: bne return_inthdr_end
109:
110: // dispatch necessary?
111: ldr ip, =Csym(knl_ctxtsk)
112: ldr lr, =Csym(knl_schedtsk)
113: ldr ip, [ip]
114: ldr lr, [lr]
115: cmp ip, lr
116: bne knl_dispatch_entry // goto dispatch processing
117:
118: return_inthdr_end:
119: ldmfd sp!, {r0-r3, ip, lr} // restore registers
120: rfefd sp! // restore SPSR_xxx, pc_xxxx(return from exception)
121:
122: /* ---------------------------------------------------------------------------------
123: * IRQ exception Stack Area
124: */
125: .section .irq_stack_section, "aw", %nobits
126: .global __irq_stack
127: __irq_stack:
128: .space EXC_STACK_SIZE
129:
130: #endif /* CPU_CORE_ARMV7A */