gonzui

    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    micro T-Kernel 3.00.03
    4:  *
    5:  *    Copyright (C) 2006-2021 by Ken Sakamura.
    6:  *    This software is distributed under the T-License 2.2.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by TRON Forum(http://www.tron.org) at 2021/03/31.
   10:  *
   11:  *----------------------------------------------------------------------
   12:  */
   13: 
   14: #include <sys/machine.h>
   15: #ifdef CPU_CORE_ARMV7M
   16: 
   17: /*
   18:  *      reset_hdr.c (ARMv7-M)
   19:  *      Reset handler
   20:  */
   21: 
   22: #include "kernel.h"
   23: #include "../../../sysdepend.h"
   24: 
   25: #include <tm/tmonitor.h>
   26: 
   27: 
   28: /* Low level memory manager information */
   29: EXPORT  void     *knl_lowmem_top;            // Head of area (Low address)
   30: EXPORT  void     *knl_lowmem_limit;          // End of area (High address)
   31: 
   32: IMPORT  const void *__data_org;
   33: IMPORT  const void *__data_start;
   34: IMPORT  const void *__data_end;
   35: IMPORT  const void *__bss_start;
   36: IMPORT  const void *__bss_end;
   37: #if USE_NOINIT
   38: IMPORT  const void *__noinit_end;
   39: #endif
   40: 
   41: IMPORT const void (*vector_tbl[])();
   42: 
   43: EXPORT void Reset_Handler(void)
   44: {
   45:         UW     *src, *top, *end;
   46:         UW     reg;
   47:         INT    i;
   48: 
   49:         /* Startup Hardware */
   50:         knl_startup_hw();
   51: 
   52: #if !USE_STATIC_IVT
   53:         /* Load Vector Table from ROM to RAM */
   54:         src = (UW*)vector_tbl;;
   55:         top = (UW*)exchdr_tbl;
   56: 
   57:         for(i=0; i < ((N_SYSVEC + N_INTVEC)); i++) {
   58:                 *top++ = *src++;
   59:         }
   60:         
   61:         /* Set Vector Table offset to SRAM */
   62:         *(_UW*)SCB_VTOR = (UW)exchdr_tbl;
   63: #endif
   64: 
   65:         /* Load .data to ram */
   66:         src = (UW*)&__data_org;;
   67:         top = (UW*)&__data_start;
   68:         end = (UW*)&__data_end;
   69:         while(top != end) {
   70:                 *top++ = *src++;
   71:         }
   72: 
   73:         /* Initialize .bss */
   74: #if USE_NOINIT
   75:         top = (UW*)&__noinit_end;
   76: #else 
   77:         top = (UW*)&__bss_start;
   78: #endif
   79:         for(i = ((INT)&__bss_end - (INT)&__bss_start)/sizeof(UW); i > 0 ; i--) {
   80:                 *top++ = 0;
   81:         }
   82: 
   83: #if USE_IMALLOC
   84:         /* Set System memory area */
   85:         if(INTERNAL_RAM_START > SYSTEMAREA_TOP) {
   86:                 knl_lowmem_top = (UW*)INTERNAL_RAM_START;
   87:         } else {
   88:                 knl_lowmem_top = (UW*)SYSTEMAREA_TOP;
   89:         }
   90:         if((UW)knl_lowmem_top < (UW)&__bss_end) {
   91:                 knl_lowmem_top = (UW*)&__bss_end;
   92:         }
   93: 
   94:         if((SYSTEMAREA_END != 0) && (INTERNAL_RAM_END > CNF_SYSTEMAREA_END)) {
   95:                 knl_lowmem_limit = (UW*)(SYSTEMAREA_END - EXC_STACK_SIZE);
   96:         } else {
   97:                 knl_lowmem_limit = (UW*)(INTERNAL_RAM_END - EXC_STACK_SIZE);
   98:         }
   99: #endif
  100: 
  101:         /* Configure exception priorities */
  102:         reg = *(_UW*)SCB_AIRCR;
  103:         reg = (reg & (~AIRCR_PRIGROUP7)) | AIRCR_PRIGROUP3;    // PRIGRP:SUBPRI = 4 : 4
  104:         *(_UW*)SCB_AIRCR = (reg & 0x0000FFFF) | AIRCR_VECTKEY;
  105:         
  106:         *(_UW*)SCB_SHPR2 = SCB_SHPR2_VAL;              // SVC pri = 0
  107:         *(_UW*)SCB_SHPR3 = SCB_SHPR3_VAL;              // SysTick = 1 , PendSV = 7
  108: 
  109:         /* Allow user to access SCB_STIR */
  110:         *(_UW*)SCB_CCR |= CCR_USERSETMPEND;
  111: 
  112: #if USE_FPU
  113:         /* Enable FPU */
  114:         *(_UW*)FPU_CPACR |= FPU_CPACR_FPUENABLE;
  115:         *(_UW*)FPU_FPCCR |= (FPU_FPCCR_ASPEN | FPU_FPCCR_LSPEN);
  116: #endif /* USE_FPU */
  117: 
  118:         /* Startup Kernel */
  119:         main();                /**** No return ****/
  120:         while(1);      /* guard - infinite loops */
  121: }
  122: 
  123: #endif  /* CPU_CORE_ARMV7M */