mtkernel_3/kernel/sysdepend/cpu/core/rxv2/exc_hdr.c | bare source | permlink (0.00 seconds) |
1: /* 2: *---------------------------------------------------------------------- 3: * micro T-Kernel 3.00.03 4: * 5: * Copyright (C) 2006-2021 by Ken Sakamura. 6: * This software is distributed under the T-License 2.2. 7: *---------------------------------------------------------------------- 8: * 9: * Released by TRON Forum(http://www.tron.org) at 2021/03/31. 10: * 11: *---------------------------------------------------------------------- 12: */ 13: 14: #include <sys/machine.h> 15: #ifdef CPU_CORE_RXV2 16: 17: /* 18: * exc_hdr.c (RXv2) 19: * Exception handler 20: */ 21: 22: #include <tk/tkernel.h> 23: #include <tm/tmonitor.h> 24: #include <kernel.h> 25: 26: #if (USE_EXCEPTION_DBG_MSG && USE_TMONITOR) 27: #define EXCEPTION_DBG_MSG(a) tm_printf((UB*)a) 28: #else 29: #define EXCEPTION_DBG_MSG(a) 30: #endif 31: 32: /* 33: * NMI handler 34: */ 35: WEAK_FUNC EXPORT void NMI_Handler(void) 36: { 37: EXCEPTION_DBG_MSG("NMI\n"); 38: while(1); 39: } 40: 41: 42: /* 43: * Supervisor Instruction Exception Handler 44: */ 45: WEAK_FUNC EXPORT void SuperVisorInst_Handler(void) 46: { 47: EXCEPTION_DBG_MSG("Supervisor Instruction Exception\n"); 48: while(1); 49: } 50: 51: /* 52: * Access Instruction Exception Handler 53: */ 54: WEAK_FUNC EXPORT void AccessInst_Handler(void) 55: { 56: EXCEPTION_DBG_MSG("Access Instruction Exception\n"); 57: while(1); 58: } 59: 60: /* 61: * Undefined Instruction Exception Handler 62: */ 63: WEAK_FUNC EXPORT void UndefinedInst_Handler(void) 64: { 65: EXCEPTION_DBG_MSG("Undefined Instruction Exception\n"); 66: while(1); 67: } 68: 69: /* 70: * Floating Point Exception Handler 71: */ 72: WEAK_FUNC EXPORT void FloatingPoint_Handler(void) 73: { 74: EXCEPTION_DBG_MSG("Floating Point Exception\n"); 75: while(1); 76: } 77: 78: /* 79: * Default HLL Interrupt Handler 80: */ 81: WEAK_FUNC EXPORT void Default_Handler(UW intno) 82: { 83: 84: #if (USE_EXCEPTION_DBG_MSG && USE_TMONITOR) 85: tm_printf((UB*)"Un-defined Interrupt %d\n",intno); 86: #endif 87: 88: while(1); 89: } 90: 91: #endif /* CPU_CORE_RXV2 */