gonzui

    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    micro T-Kernel 3.00.03
    4:  *
    5:  *    Copyright (C) 2006-2021 by Ken Sakamura.
    6:  *    This software is distributed under the T-License 2.2.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by TRON Forum(http://www.tron.org) at 2021/03/31.
   10:  *
   11:  *----------------------------------------------------------------------
   12:  */
   13: 
   14: #include <sys/machine.h>
   15: #ifdef CPU_RX231
   16: 
   17: /*
   18:  *      cpu_clock.c (RX231)
   19:  *      Clock Setting
   20:  */
   21: 
   22: #include <tk/tkernel.h>
   23: 
   24: #include "sysdepend.h"
   25: 
   26: /*
   27:  *  Startup System Clock
   28:  *    Used Main Clock(8MHz), Uesd PLL/UPLL, System Clock 54MHz
   29:  *    ICLK:54MHz, PCLKA:54MHz, PCLKB:27MHz, PCLKD:54MHz, FCLK:1.6875MHz, UCLK:48MHz
   30:  */
   31: EXPORT void startup_clock(void)
   32: {
   33:         out_h(SYSTEM_PRCR, 0xA503);                    /* Register Protect Disable */
   34: 
   35:         out_b(SYSTEM_MOSCWTCR, 0x05);                  /* LOCO(4MHz)*16384cyc=4.096ms(Over 3ms) */
   36:         out_b(SYSTEM_MOSCCR, 0x00);                    /* Enable Main Clock */
   37: 
   38:         while(!(in_b(SYSTEM_OSCOVFSR) & 0x01));                /* Wait Main Clock Stabilization */
   39: 
   40:         out_h(SYSTEM_PLLCR, 0x1A01);                   /* PLL 8MHz/2*13.5=54MHz */
   41:         out_b(SYSTEM_PLLCR2, 0x00);                    /* Enable PLL */
   42:         while(!(in_b(SYSTEM_OSCOVFSR) & 0x04));                /* Wait PLL Stabilization */
   43: 
   44:         out_h(SYSTEM_UPLLCR, 0x0B11);                  /* UPLL 8MHz/1*6=48MHz */
   45:         out_b(SYSTEM_UPLLCR2, 0x00);                   /* Enable UPLL */
   46:         while( !(in_b(SYSTEM_OSCOVFSR) & 0x20));       /* Wait UPLL Stabilization */
   47: 
   48:         out_b(SYSTEM_OPCCR, 0x00);                     /* High Speed Mode */
   49:         while( in_b(SYSTEM_OPCCR) & 0x10);             /* Wait Transition Completed */
   50:         
   51:         out_b(SYSTEM_MEMWAIT, 0x01);                   /* Memory Wait States */
   52: 
   53:         out_w(SYSTEM_SCKCR, 0x50860100);               /* ICLK=PCLKA=PCLKD:54MHz,PCLKB:27MHz,UCLK:48MHz,FCLK:1.6875MHz */
   54:         out_h(SYSTEM_SCKCR3, 0x0400);                  /* Select PLL */
   55: 
   56:         out_b(SYSTEM_LOCOCR, 0x01);                    /* Disable LOCO */
   57: 
   58:         out_h(SYSTEM_PRCR, 0xA500);                    /* Register protect Enable */
   59: 
   60:         return;
   61: }
   62: 
   63: 
   64: EXPORT void shutdown_clock(void)
   65: {
   66: }
   67: 
   68: #endif /* CPU_RX231 */