mtkernel_3/lib/libtk/sysdepend/cpu/core/armv7m/int_armv7m.h | bare source | permlink (0.00 seconds) |
1: /* 2: *---------------------------------------------------------------------- 3: * micro T-Kernel 3.00.03 4: * 5: * Copyright (C) 2006-2021 by Ken Sakamura. 6: * This software is distributed under the T-License 2.2. 7: *---------------------------------------------------------------------- 8: * 9: * Released by TRON Forum(http://www.tron.org) at 2021/03/31. 10: * 11: *---------------------------------------------------------------------- 12: */ 13: 14: #ifndef __LIBTK_INT_ACM4_H__ 15: #define __LIBTK_INT_ACM4_H_ 16: 17: /* 18: * int_armv7m.h 19: * 20: * Interrupt controller (ARMv7-M) 21: */ 22: 23: /*----------------------------------------------------------------------*/ 24: /* 25: * Interrupt controller (NVIC) Control 26: */ 27: 28: /* 29: * Enable interrupt for NVIC 30: */ 31: EXPORT void EnableInt_nvic( UINT intno, INT level ); 32: 33: /* 34: * Disable interrupt for NVIC 35: */ 36: Inline void DisableInt_nvic( UINT intno ) 37: { 38: *(_UW*)(NVIC_ICER(intno)) = (0x01U << (intno % 32)); 39: } 40: 41: /* 42: * Clear interrupt for NVIC 43: */ 44: Inline void ClearInt_nvic( UINT intno ) 45: { 46: *(_UW*)(NVIC_ICPR(intno)) = (0x01U << (intno % 32)); 47: } 48: 49: /* 50: * Check active state for NVIC 51: */ 52: Inline BOOL CheckInt_nvic( UINT intno ) 53: { 54: return (*(_UW*)(NVIC_ICPR(intno)) & (0x01U << (intno % 32))); 55: } 56: 57: #endif /* __LIBTK_INT_ACM4_H__ */