mtkernel_3/lib/libtk/sysdepend/cpu/stm32l4/int_stm32l4.c | bare source | permlink (0.01 seconds) |
1: /* 2: *---------------------------------------------------------------------- 3: * micro T-Kernel 3.00.03 4: * 5: * Copyright (C) 2006-2021 by Ken Sakamura. 6: * This software is distributed under the T-License 2.2. 7: *---------------------------------------------------------------------- 8: * 9: * Released by TRON Forum(http://www.tron.org) at 2021/03/31. 10: * 11: *---------------------------------------------------------------------- 12: */ 13: 14: #include <sys/machine.h> 15: #ifdef CPU_STM32L4 16: 17: /* 18: * int_stm32l4.c 19: * 20: * Interrupt controller (STM32L4 ) 21: */ 22: #include <tk/tkernel.h> 23: #include <tk/syslib.h> 24: 25: #include "../core/armv7m/int_armv7m.h" 26: 27: /*----------------------------------------------------------------------*/ 28: /* 29: * EXTI (Extended interrupt controller) functions 30: * 31: */ 32: LOCAL void EnableInt_exti( UINT intno, INT level ) 33: { 34: if(intno < 32) { 35: *(_UW*)EXTI_IMR1 |= (UW)(1<<intno); 36: } else { 37: *(_UW*)EXTI_IMR2 |= (UW)(1<<(intno-32)); 38: } 39: } 40: 41: LOCAL void DisableInt_exti( UINT intno ) 42: { 43: if(intno < 32) { 44: *(_UW*)EXTI_IMR1 &= ~(UW)(1<<intno); 45: } else { 46: *(_UW*)EXTI_IMR2 &= ~(UW)(1<<(intno-32)); 47: } 48: 49: } 50: 51: LOCAL void ClearInt_exti( UINT intno ) 52: { 53: if(intno < 32) { 54: *(_UW*)EXTI_PR1 |= (UW)(1<<intno); 55: } else { 56: *(_UW*)EXTI_PR2 |= (UW)(1<<(intno-32)); 57: } 58: 59: } 60: 61: LOCAL BOOL CheckInt_exti( UINT intno ) 62: { 63: UW pif; 64: 65: if(intno < 32) { 66: pif = *(_UW*)EXTI_PR1 & (UW)(1<<intno); 67: } else { 68: pif = *(_UW*)EXTI_PR2 & (UW)(1<<(intno-32)); 69: } 70: return pif?TRUE:FALSE; 71: } 72: 73: LOCAL void SetIntMode_exti(UINT intno, UINT mode) 74: { 75: if(mode & IM_HI) { 76: if(intno < 32) { 77: *(_UW*)EXTI_RTSR1 |= (UW)(1<<intno); 78: } else { 79: *(_UW*)EXTI_RTSR2 |= (UW)(1<<(intno-32)); 80: } 81: } 82: if(mode & IM_LOW) { 83: if(intno < 32) { 84: *(_UW*)EXTI_FTSR1 |= (UW)(1<<intno); 85: } else { 86: *(_UW*)EXTI_FTSR2 |= (UW)(1<<(intno-32)); 87: } 88: } 89: } 90: 91: /*----------------------------------------------------------------------*/ 92: /* 93: * Interrupt control API 94: * 95: */ 96: /* 97: * Enable interrupt 98: */ 99: EXPORT void EnableInt( UINT intno, INT level ) 100: { 101: if( intno <= MAX_NVIC_INTNO) { 102: EnableInt_nvic( intno, level); 103: } else if(intno >= MIN_EXTI_INTNO && intno <= MAX_EXTI_INTNO) { 104: EnableInt_exti( intno - MIN_EXTI_INTNO, level); 105: } 106: } 107: 108: /* 109: * Disable interrupt 110: */ 111: EXPORT void DisableInt( UINT intno ) 112: { 113: if( intno <= MAX_NVIC_INTNO) { 114: DisableInt_nvic( intno); 115: } else if(intno >= MIN_EXTI_INTNO && intno <= MAX_EXTI_INTNO) { 116: DisableInt_exti( intno - MIN_EXTI_INTNO); 117: } 118: } 119: 120: /* 121: * Clear interrupt 122: */ 123: EXPORT void ClearInt(UINT intno) 124: { 125: if( intno <= MAX_NVIC_INTNO) { 126: ClearInt_nvic( intno); 127: } else if(intno >= MIN_EXTI_INTNO && intno <= MAX_EXTI_INTNO) { 128: ClearInt_exti( intno - MIN_EXTI_INTNO); 129: } 130: } 131: 132: /* 133: * Issue EOI to interrupt controller 134: */ 135: EXPORT void EndOfInt(UINT intno) 136: { 137: /* No opetarion. */ 138: } 139: 140: /* 141: * Check active state 142: */ 143: EXPORT BOOL CheckInt( UINT intno ) 144: { 145: BOOL rtncd; 146: 147: if( intno <= MAX_NVIC_INTNO) { 148: rtncd = CheckInt_nvic( intno); 149: } else if(intno >= MIN_EXTI_INTNO && intno <= MAX_EXTI_INTNO) { 150: rtncd = CheckInt_exti( intno - MIN_EXTI_INTNO); 151: } else { 152: rtncd = FALSE; 153: } 154: return rtncd; 155: } 156: 157: /* 158: * Set interrupt mode 159: */ 160: EXPORT void SetIntMode(UINT intno, UINT mode) 161: { 162: if(intno >= MIN_EXTI_INTNO && intno <= MAX_EXTI_INTNO) { 163: SetIntMode_exti( intno - MIN_EXTI_INTNO, mode); 164: } 165: } 166: 167: #endif /* CPU_STM32L4 */