mtkernel_3/lib/libtk/sysdepend/cpu/tx03_m367/int_m367.c | bare source | permlink (0.03 seconds) |
1: /* 2: *---------------------------------------------------------------------- 3: * micro T-Kernel 3.00.05 4: * 5: * Copyright (C) 2006-2021 by Ken Sakamura. 6: * This software is distributed under the T-License 2.2. 7: *---------------------------------------------------------------------- 8: * 9: * Released by TRON Forum(http://www.tron.org) at 2021/11. 10: * 11: *---------------------------------------------------------------------- 12: */ 13: 14: #include <sys/machine.h> 15: #ifdef CPU_TMPM367FDFG 16: 17: /* 18: * int.c 19: * 20: * Interrupt controller (TX03M67 ) 21: */ 22: #include <tk/tkernel.h> 23: #include <tk/syslib.h> 24: 25: #include "../core/armv7m/int_armv7m.h" 26: 27: /*----------------------------------------------------------------------*/ 28: /* 29: * Interrupt control API 30: * 31: */ 32: 33: /* 34: * Enable interrupt 35: */ 36: EXPORT void EnableInt( UINT intno, INT level ) 37: { 38: EnableInt_nvic( intno, level); 39: } 40: 41: /* 42: * Disable interrupt 43: */ 44: EXPORT void DisableInt( UINT intno ) 45: { 46: DisableInt_nvic( intno); 47: } 48: 49: /* 50: * Clear interrupt 51: */ 52: EXPORT void ClearInt(UINT intno) 53: { 54: UW val; 55: 56: ClearInt_nvic(intno); /* Un-pends the associated interrupt */ 57: 58: /* Clear Clock Generetor Interrupt request */ 59: switch (intno) { 60: case M367_INTUSBWKUP: 61: val = 12; 62: break; 63: case M367_INTD: 64: val = 13; 65: break; 66: case M367_INTRTC: 67: val = 14; 68: break; 69: case M367_INTRMCRX: 70: val = 15; 71: break; 72: default: 73: if(intno >= M367_INT0 && intno <= M367_INTC) { 74: val = intno; 75: } else { 76: return; 77: } 78: break; 79: } 80: *(_UW*)CLKCTRL_CGICRCG = val; 81: } 82: 83: /* 84: * Issue EOI to interrupt controller 85: */ 86: EXPORT void EndOfInt(UINT intno) 87: { 88: /* No opetarion. */ 89: } 90: 91: /* 92: * Check active state 93: */ 94: EXPORT BOOL CheckInt( UINT intno ) 95: { 96: return CheckInt_nvic( intno); 97: } 98: 99: /* 100: * Set interrupt mode 101: */ 102: EXPORT void SetIntMode(UINT intno, UINT mode) 103: { 104: _UW *cgimcg; /* CG Interrupt mode control register */ 105: UINT n, e, k, s; 106: 107: switch (intno) { 108: case M367_INTUSBWKUP: 109: n = 12; 110: break; 111: case M367_INTD: 112: n = 13; 113: break; 114: case M367_INTRTC: 115: n = 14; 116: break; 117: case M367_INTRMCRX: 118: n = 15; 119: break; 120: default: 121: if(intno >= M367_INT0 && intno <= M367_INTC) { 122: n = intno; 123: } else { 124: return; 125: } 126: break; 127: } 128: 129: if(mode & IM_LEVEL) { 130: e = 0; /* Level sence */ 131: } else { 132: e = 2; /* Edge sense */ 133: } 134: if(~(mode & IM_LOW)) { 135: e++; 136: } 137: 138: cgimcg = (_UW*)(CLKCTRL_CGIMCG) + (n >> 2); 139: k = (intno & 3) <<3; 140: 141: DI(s); 142: *cgimcg = (*cgimcg & ~(7 << (k + 4))) | (e << (k + 4)); 143: *cgimcg |= (1 << k); 144: EI(s); 145: } 146: 147: #endif /* CPU_TMPM367FDFG */