gonzui

    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    micro T-Kernel 3.00.04
    4:  *
    5:  *    Copyright (C) 2006-2021 by Ken Sakamura.
    6:  *    This software is distributed under the T-License 2.2.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by TRON Forum(http://www.tron.org) at 2021/05/17.
   10:  *
   11:  *----------------------------------------------------------------------
   12:  */
   13: 
   14: /*
   15:  *    tm_com.c
   16:  *    T-Monitor Communication low-level device driver (M367 IoT-Engine)
   17:  */
   18: 
   19: #include <tk/typedef.h>
   20: #include <sys/sysdef.h>
   21: 
   22: #if USE_TMONITOR
   23: #include "../../libtm.h"
   24: 
   25: #ifdef IOTE_M367
   26: #if TM_COM_SERIAL_DEV
   27: 
   28: #define UART_BASE               (0x40049000UL)
   29: 
   30: #define UART_DR                 (*(_UW*)(UART_BASE + 0x0000)) /* Data register */
   31: #define UART_FR                 (*(_UW*)(UART_BASE + 0x0018)) /* Flag register */
   32: #define UART_IBDR               (*(_UW*)(UART_BASE + 0x0024))       /* Integer baud rate register */
   33: #define UART_FBDR               (*(_UW*)(UART_BASE + 0x0028))       /* Fractional baud rate register */
   34: #define UART_LCR_H              (*(_UW*)(UART_BASE + 0x002C))      /* Line control register */
   35: #define UART_CR                 (*(_UW*)(UART_BASE + 0x0030)) /* Control register */
   36: #define UART_IMSC               (*(_UW*)(UART_BASE + 0x0038))       /* Interrupt mask set/clear register */
   37: #define UART_RIS                (*(_UW*)(UART_BASE + 0x003C))        /* Raw interrupt status register */
   38: #define UART_ICR                (*(_UW*)(UART_BASE + 0x0044))        /* Interrupt clear register */
   39: #define UART_DMACR              (*(_UW*)(UART_BASE + 0x0048))      /* DMA control register */
   40: 
   41: #define UART_FR_TXFE            (1 << 7)
   42: #define UART_FR_RXFE            (1 << 4)
   43: 
   44: #define UART_LCR_H_WLEN(n)      (((n)-5) << 5)
   45: 
   46: #define UART_CR_RTS             (1 << 11)
   47: #define UART_CR_DTR             (1 << 10)
   48: #define UART_CR_RXE             (1 << 9)
   49: #define UART_CR_TXE             (1 << 8)
   50: #define UART_CR_UARTEN          (1 << 0)
   51: 
   52: 
   53: EXPORT  void     tm_snd_dat( const UB* buf, INT size )
   54: {
   55:         UB     *b;
   56: 
   57:         for( b = (UB *)buf; size > 0; size--, b++ ){
   58:                 while ( (UART_FR & UART_FR_TXFE) == 0 );
   59:                 UART_DR = *b;
   60:                 while ( (UART_FR & UART_FR_TXFE) == 0 );
   61:         }
   62: }
   63: 
   64: 
   65: EXPORT  void     tm_rcv_dat( UB* buf, INT size )
   66: {
   67:         for( ; size > 0; size--, buf++ ){
   68:                 while ( (UART_FR & UART_FR_RXFE) != 0 );
   69:                 *buf = UART_DR & 0xff;
   70:         }
   71: }
   72: 
   73: 
   74: EXPORT  void     tm_com_init(void)
   75: {
   76:         UW     n;
   77: 
   78:         UART_CR = 0;
   79:         UART_DMACR = 0;
   80:         UART_IMSC = 0;
   81:         UART_ICR = UART_RIS;
   82: 
   83:         n = CLOCK_fsys * (64*2 / 16) / 115200;
   84:         n = (n + 1) >> 1;
   85:         UART_IBDR = n >> 6;
   86:         UART_FBDR = n & 0x3f;
   87: 
   88:         /* data 8bit, stop 1bit, no parity */
   89:         UART_LCR_H = UART_LCR_H_WLEN(8);
   90: 
   91:         UART_CR =
   92:                 UART_CR_RTS | UART_CR_DTR |
   93:                 UART_CR_RXE | UART_CR_TXE | UART_CR_UARTEN;
   94: }
   95: 
   96: #endif /* TM_COM_SERIAL_DEV */
   97: #endif /* IOTE_M367 */
   98: #endif /* USE_TMONITOR */