gonzui

    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    T2EX Software Package
    4:  *
    5:  *    Copyright 2012 by Ken Sakamura.
    6:  *    This software is distributed under the latest version of T-License 2.x.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by T-Engine Forum(http://www.t-engine.org/) at 2012/12/12.
   10:  *    Modified by TRON Forum(http://www.tron.org/) at 2015/06/04.
   11:  *
   12:  *----------------------------------------------------------------------
   13:  */
   14: /*
   15:  * This software package is available for use, modification, 
   16:  * and redistribution in accordance with the terms of the attached 
   17:  * T-License 2.x.
   18:  * If you want to redistribute the source code, you need to attach 
   19:  * the T-License 2.x document.
   20:  * There's no obligation to publish the content, and no obligation 
   21:  * to disclose it to the TRON Forum if you have modified the 
   22:  * software package.
   23:  * You can also distribute the modified source code. In this case, 
   24:  * please register the modification to T-Kernel traceability service.
   25:  * People can know the history of modifications by the service, 
   26:  * and can be sure that the version you have inherited some 
   27:  * modification of a particular version or not.
   28:  *
   29:  *    http://trace.tron.org/tk/?lang=en
   30:  *    http://trace.tron.org/tk/?lang=ja
   31:  *
   32:  * As per the provisions of the T-License 2.x, TRON Forum ensures that 
   33:  * the portion of the software that is copyrighted by Ken Sakamura or 
   34:  * the TRON Forum does not infringe the copyrights of a third party.
   35:  * However, it does not make any warranty other than this.
   36:  * DISCLAIMER: TRON Forum and Ken Sakamura shall not be held
   37:  * responsible for any consequences or damages caused directly or
   38:  * indirectly by the use of this software package.
   39:  *
   40:  * The source codes in bsd_source.tar.gz in this software package are 
   41:  * derived from NetBSD or OpenBSD and not covered under T-License 2.x.
   42:  * They need to be changed or redistributed according to the 
   43:  * representation of each source header.
   44:  */
   45: 
   46: /*
   47:  *      @(#)atomic_depend.h (sys/EM1-D512)
   48:  *
   49:  *      Atomic integer operations
   50:  */
   51: 
   52: #ifndef __SYS_ATOMIC_DEPEND_H__
   53: #define __SYS_ATOMIC_DEPEND_H__
   54: 
   55: #define ATOMIC_INC_USER_MODE 1
   56: Inline UINT atomic_inc(volatile UINT* addr)
   57: {
   58:         UINT excl, re;
   59: 
   60:         do {
   61:                 Asm(" ldrex   %2, [%3]\n"
   62:                     "   add       %2, %2, #1\n"
   63:                     "   strex     %1, %2, [%3]"
   64:                         : "+m"(*addr), "=r"(excl), "=r"(re)
   65:                         : "r"(addr)
   66:                         : "cc", "memory");
   67:         } while (excl);
   68: 
   69:         return re;
   70: }
   71: 
   72: #define ATOMIC_DEC_USER_MODE 1
   73: Inline UINT atomic_dec(volatile UINT* addr)
   74: {
   75:         UINT excl, re;
   76: 
   77:         do {
   78:                 Asm(" ldrex   %2, [%3]\n"
   79:                     "   sub       %2, %2, #1\n"
   80:                     "   strex     %1, %2, [%3]"
   81:                         : "+m"(*addr), "=r"(excl), "=r"(re)
   82:                         : "r"(addr)
   83:                         : "cc", "memory");
   84:         } while (excl);
   85: 
   86:         return re;
   87: }
   88: 
   89: #define ATOMIC_ADD_USER_MODE 1
   90: Inline UINT atomic_add(volatile UINT* addr, UINT val)
   91: {
   92:         UINT excl, re;
   93: 
   94:         do {
   95:                 Asm(" ldrex   %2, [%3]\n"
   96:                     "   add       %2, %2, %4\n"
   97:                     "   strex     %1, %2, [%3]"
   98:                         : "+m"(*addr), "=r"(excl), "=r"(re)
   99:                         : "r"(addr), "r"(val)
  100:                         : "cc", "memory");
  101:         } while (excl);
  102: 
  103:         return re;
  104: }
  105: 
  106: #define ATOMIC_SUB_USER_MODE 1
  107: Inline UINT atomic_sub(volatile UINT* addr, UINT val)
  108: {
  109:         UINT excl, re;
  110: 
  111:         do {
  112:                 Asm(" ldrex   %2, [%3]\n"
  113:                     "   sub       %2, %2, %4\n"
  114:                     "   strex     %1, %2, [%3]"
  115:                         : "+m"(*addr), "=r"(excl), "=r"(re)
  116:                         : "r"(addr), "r"(val)
  117:                         : "cc", "memory");
  118:         } while (excl);
  119: 
  120:         return re;
  121: }
  122: 
  123: /* TAS: test-and-set */
  124: #define ATOMIC_XCHG_USER_MODE 1
  125: Inline UINT atomic_xchg(volatile UINT* addr, UINT val)
  126: {
  127:         UINT excl, re;
  128: 
  129:         do {
  130:                 Asm(" ldrex   %2, [%3]\n"
  131:                     "   strex     %1, %4, [%3]"
  132:                         : "+m"(*addr), "=r"(excl), "=r"(re)
  133:                         : "r"(addr), "r"(val)
  134:                         : "cc", "memory");
  135:         } while (excl);
  136: 
  137:         return re;
  138: }
  139: 
  140: /* CAS: compare-and-swap */
  141: #define ATOMIC_CMPXCHG_USER_MODE 1
  142: Inline UINT atomic_cmpxchg(volatile UINT* addr, UINT val, UINT cmp)
  143: {
  144:         UINT excl, re;
  145: 
  146:         do {
  147:                 Asm(" mov     %1, #0\n"
  148:                     " ldrex   %2, [%3]\n"
  149:                     " cmp     %2, %5\n"
  150:                     "   strexeq   %1, %4, [%3]\n"
  151:                     "   clrex"
  152:                         : "+m"(*addr), "=r"(excl), "=r"(re)
  153:                         : "r"(addr), "r"(val), "r"(cmp)
  154:                         : "cc", "memory");
  155:         } while (excl);
  156: 
  157:         return re;
  158: }
  159: 
  160: #define ATOMIC_BITSET_USER_MODE 1
  161: Inline UINT atomic_bitset(volatile UINT* addr, UINT setptn)
  162: {
  163:         UINT excl, re, tmp;
  164: 
  165:         do {
  166:                 Asm(" ldrex   %2, [%4]\n"
  167:                     "   orr       %3, %2, %5\n"
  168:                     "   strex     %1, %3, [%4]"
  169:                         : "+m"(*addr), "=r"(excl), "=r"(re), "=r"(tmp)
  170:                         : "r"(addr), "r"(setptn)
  171:                         : "cc", "memory");
  172:         } while (excl);
  173: 
  174:         return re;
  175: }
  176: 
  177: #define ATOMIC_BITCLR_USER_MODE 1
  178: Inline UINT atomic_bitclr(volatile UINT* addr, UINT clrptn)
  179: {
  180:         UINT excl, re, tmp;
  181: 
  182:         do {
  183:                 Asm(" ldrex   %2, [%4]\n"
  184:                     "   and       %3, %2, %5\n"
  185:                     "   strex     %1, %3, [%4]"
  186:                         : "+m"(*addr), "=r"(excl), "=r"(re), "=r"(tmp)
  187:                         : "r"(addr), "r"(clrptn)
  188:                         : "cc", "memory");
  189:         } while (excl);
  190: 
  191:         return re;
  192: }
  193: 
  194: #endif /* __SYS_ATOMIC_DEPEND_H__ */