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    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    T-Kernel 2.0 Software Package
    4:  *
    5:  *    Copyright 2011 by Ken Sakamura.
    6:  *    This software is distributed under the latest version of T-License 2.x.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by T-Engine Forum(http://www.t-engine.org/) at 2011/05/17.
   10:  *    Modified by TRON Forum(http://www.tron.org/) at 2015/06/01.
   11:  *
   12:  *----------------------------------------------------------------------
   13:  */
   14: 
   15: /*
   16:  *      rs.h         Serial(RS-232C) driver definition
   17:  */
   18: 
   19: #ifndef __DEVICE_RS_H__
   20: #define __DEVICE_RS_H__
   21: 
   22: #include <basic.h>
   23: #include <tk/devmgr.h>
   24: #include <tk/syslib.h>
   25: 
   26: #ifdef __cplusplus
   27: extern "C" {
   28: #endif
   29: 
   30: /* RS data number */
   31: typedef enum {
   32:         /* Common attribute */
   33:         DN_PCMCIAINFO  = TDN_PCMCIAINFO,
   34:                                 /* PC card number   data: PCMCIAInfo R */
   35:         /* Individual attribute */
   36:         DN_RSMODE      = -100,      /* Communication mode        data: RsMode   RW */
   37:         DN_RSFLOW      = -101,      /* Flow control              data: RsFlow        RW */
   38:         DN_RSSTAT      = -102,      /* Line status               data: RsStat R  */
   39:         DN_RSBREAK     = -103,     /* Send "BREAK"     data: UW   W  */
   40:         DN_RSSNDTMO    = -104,    /* Send time-out   data: UW  RW */
   41:         DN_RSRCVTMO    = -105,    /* Receive time-out        data: UW       RW */
   42:         DN_RSADDIN     = -150,     /* Additional function : unsupported        */
   43:         /* IBM keyboard additional function exclusive attribute:unsupported    */
   44:         DN_IBMKB_KBID  = -200,  /* Keyboard ID   */
   45:         /* Touch panel additional function exclusive attribute: unsupported    */
   46:         DN_TP_CALIBSTS = -200, /* Calib status         */
   47:         DN_TP_CALIBPAR = -201, /* Calib parameter      */
   48:         /* System type attribute  */
   49:         DN_RS16450     = -300      /* Hardware configuration data: RsHwConf_16450 RW */
   50: } RSDataNo;
   51: 
   52: /* DN_RSMODE: Communication mode (RW) */
   53: typedef struct {
   54:         UW     parity:2;   /* 0: non, 1: odd number, 2: even number, and  3: -       */
   55:         UW     datalen:2;  /* 0: 5 bit,1: 6 bit,2: 7 bit,3: 8 bit */
   56:         UW     stopbits:2; /* 0: 1 bit,1: 1.5 bit,2: 2 bit,3: - */
   57:         UW     rsv:2;              /* Reserved */
   58:         UW     baud:24;    /* Baud rate */
   59: } RsMode;
   60: 
   61: /* DN_RSFLOW:   Flow control (RW) */
   62: typedef struct {
   63:         UW     rsv:26;             /* Reserved */
   64:         UW     rcvxoff:1;  /* "XOFF" status/Compulsory change */
   65:         UW     csflow:1;   /* "CTS" control */
   66:         UW     rsflow:1;   /* "RTS" control */
   67:         UW     xonany:1;   /* "XON" by any character */
   68:         UW     sxflow:1;   /* Send "XON/XOFF" control */
   69:         UW     rxflow:1;   /* Receive "XON/XOFF" contorol */
   70: } RsFlow;
   71: 
   72: /* DN_RSSTAT:   Line status (R) */
   73: typedef struct {
   74: #if BIGENDIAN
   75:         UW     rsv1:20;
   76:         UW     BE:1;       /* Recv Buffer Overflow Error */
   77:         UW     FE:1;       /* Framing Error      */
   78:         UW     OE:1;       /* Overrun Error      */
   79:         UW     PE:1;       /* Parity Error               */
   80:         UW     rsv2:2;
   81:         UW     XF:1;       /* Recv XOFF          */
   82:         UW     BD:1;       /* Break Detect               */
   83:         UW     DR:1;       /* Dataset Ready (DSR)        */
   84:         UW     CD:1;       /* Carrier Detect (DCD)       */
   85:         UW     CS:1;       /* Clear to Send (CTS)        */
   86:         UW     CI:1;       /* Calling Indicator(RI)*/
   87: #else
   88:         UW     CI:1;       /* Calling Indicator(RI)*/
   89:         UW     CS:1;       /* Clear to Send (CTS)        */
   90:         UW     CD:1;       /* Carrier Detect (DCD)       */
   91:         UW     DR:1;       /* Dataset Ready (DSR)        */
   92:         UW     BD:1;       /* Break Detect               */
   93:         UW     XF:1;       /* Recv XOFF          */
   94:         UW     rsv2:2;
   95:         UW     PE:1;       /* Parity Error               */
   96:         UW     OE:1;       /* Overrun Error      */
   97:         UW     FE:1;       /* Framing Error      */
   98:         UW     BE:1;       /* Recv Buffer Overflow Error*/
   99:         UW     rsv1:20;
  100: #endif
  101: } RsStat;
  102: 
  103: /* Error information*/
  104: typedef struct {
  105: #if BIGENDIAN
  106:         UW     ErrorClass:16;      /* Error class= EC_IO */
  107:         UW     rsv1:2;
  108:         UW     Aborted:1;  /* Aborted       */
  109:         UW     Timout:1;   /* Time out       */
  110:         /* Same as "RsStat" from here */
  111:         UW     BE:1;               /* Recv Buffer Overflow Error */
  112:         UW     FE:1;               /* Framing Error     */
  113:         UW     OE:1;               /* Overrun Error     */
  114:         UW     PE:1;               /* Parity Error              */
  115:         UW     rsv2:2;
  116:         UW     XF:1;               /* Recv XOFF         */
  117:         UW     BD:1;               /* Break Detect              */
  118:         UW     DR:1;               /* Dataset Ready (DSR)       */
  119:         UW     CD:1;               /* Carrier Detect (DCD)      */
  120:         UW     CS:1;               /* Clear to Send (CTS)       */
  121:         UW     CI:1;               /* Calling Indicator(RI)*/
  122: #else
  123:         UW     CI:1;               /* Calling Indicator(RI)*/
  124:         UW     CS:1;               /* Clear to Send (CTS)       */
  125:         UW     CD:1;               /* Carrier Detect (DCD)      */
  126:         UW     DR:1;               /* Dataset Ready (DSR)       */
  127:         UW     BD:1;               /* Break Detect              */
  128:         UW     XF:1;               /* Recv XOFF         */
  129:         UW     rsv2:2;
  130:         UW     PE:1;               /* Parity Error              */
  131:         UW     OE:1;               /* Overrun Error     */
  132:         UW     FE:1;               /* Framing Error     */
  133:         UW     BE:1;               /* Recv Buffer Overflow Error */
  134:         /* Same as "RsStat" until here */
  135:         UW     Timout:1;   /* Time out       */
  136:         UW     Aborted:1;  /* Aborted       */
  137:         UW     rsv1:2;
  138:         UW     ErrorClass:16;      /* Error class = "EC_IO" */
  139: #endif
  140: } RsError;
  141: 
  142: /* DN_RS16450:  Hardware configuration (compliant with 16450) (RW) */
  143: typedef struct {
  144:         UW     iobase;             /* Top address of I/O space */
  145:         UW     iostep;             /* Interval between "I/O" addresses for each register */
  146:         INTVEC intvec;         /* Interrupt vector */
  147: } RsHwConf_16450;
  148: 
  149: #ifdef __cplusplus
  150: }
  151: #endif
  152: #endif /* __DEVICE_RS_H__ */