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tkernel_2/kernel/sysdepend/device/tef_em1d/icrt0.Sbare sourcepermlink (0.02 seconds)

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    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    T-Kernel 2.0 Software Package
    4:  *
    5:  *    Copyright 2011 by Ken Sakamura.
    6:  *    This software is distributed under the latest version of T-License 2.x.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by T-Engine Forum(http://www.t-engine.org/) at 2011/05/17.
   10:  *    Modified by TRON Forum(http://www.tron.org/) at 2015/06/01.
   11:  *
   12:  *----------------------------------------------------------------------
   13:  */
   14: 
   15: /*
   16:  *      icrt0.S (EM1-D512)
   17:  *      System Startup
   18:  */
   19: 
   20: #include <machine.h>
   21: #include <tk/asm.h>
   22: 
   23: #if _Csym == 0
   24: #define START   _start
   25: #else
   26: #define START   start
   27: #endif
   28: 
   29:         /* Low level memory manager information */
   30:         .comm  Csym(lowmem_top), 4      // Head of area (Low address)
   31:         .comm  Csym(lowmem_limit), 4    // End of area (High address)
   32: 
   33:         .lcomm monitor_stacktop, 4     // Monitor stack pointer for re-startup
   34: 
   35: #define SYSINFO         0x30004400     // System common information
   36: #define RAM_TOP         (SYSINFO + 0)  // Head of ext. RAM free area
   37: #define RAM_END         (SYSINFO + 4)  // End of ext. RAM free area
   38: 
   39:         .text
   40:         .balign        4
   41:         .globl START
   42:         .type  START, %function
   43: START:
   44:         /* Use the stack set by the monitor */
   45:         ldr    ip, =PSR_SVC|PSR_DI|PSR_F  // SVC mode/Interrupt disable
   46:         msr    cpsr_xc, ip
   47: 
   48:         /* MMU is already ON. The initial setting is done.
   49:            Only cache should be ON */
   50:         mrc    p15, 0, r4, cr1, c0
   51:         orr    r4, r4, #CR1_C
   52:         orr    r4, r4, #CR1_I|CR1_Z
   53:         mcr    p15, 0, r4, cr1, c0
   54:         ldr    r4, =0
   55:         mcr    p15, 0, r4, cr7, c7, 0     // Cache flush
   56: 
   57:         ldr    r5, =__data_org            // Initialization of 'data' area (ROM startup)
   58:         ldr    r6, =__data_start
   59:         subs   r10, r5, r6               // If r10 != 0, start Rom
   60:         beq    nocopy_data
   61:         ldr    r7, =_edata
   62:         cmp    r6, r7
   63:         bhs    nocopy_data
   64:   copy_data:
   65:         ldr    r4, [r5], #4
   66:         str    r4, [r6], #4
   67:         cmp    r6, r7
   68:         blo    copy_data
   69:   nocopy_data:
   70: 
   71:         ldr    r4, =0                     // Clear 'bss' area
   72:         ldr    r5, =__bss_start
   73:         ldr    r6, =_end
   74:         cmp    r5, r6
   75:         bhs    nobss
   76:   clrbss:
   77:         str    r4, [r5], #4
   78:         cmp    r5, r6
   79:         blo    clrbss
   80:   nobss:
   81: 
   82:         ldr    ip, =monitor_stacktop      // Monitor stack pointer for re-startup
   83:         str    sp, [ip]           // Save
   84:         bic    sp, sp, #7         // align stack modulo 8 bytes.
   85: 
   86:         ldr    ip, =RAM_TOP               // Low level memory manager initial setting
   87:         ldr    r5, [ip]
   88:         cmp    r6, r5                     // _end or RAM_TOP
   89:         movhi  r5, r6                   // Either of High addresses
   90:         ldr    ip, =lowmem_top
   91:         str    r5, [ip]           // lowmem_top = _end or RAM_TOP
   92:         ldr    ip, =RAM_END
   93:         ldr    r5, [ip]
   94:         ldr    ip, =lowmem_limit
   95:         str    r5, [ip]           // lowmem_limit = RAM_END
   96: 
   97:         cmp    r10, #0
   98:         blne   Csym(ROM_startup) // Initialization at ROM startup
   99: 
  100:         bl     Csym(main)          // System startup
  101: 
  102:   l_end:                                // Not suppose to return from 'main,'
  103:         b      l_end                        // but, just in case, prepare for out of control.