gonzui: tkernel_2/monitor/hwdepend/tef

    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    T-Kernel 2.0 Software Package
    4:  *
    5:  *    Copyright 2011 by Ken Sakamura.
    6:  *    This software is distributed under the latest version of T-License 2.x.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by T-Engine Forum(http://www.t-engine.org/) at 2011/05/17.
   10:  *    Modified by TRON Forum(http://www.tron.org/) at 2015/06/01.
   11:  *
   12:  *----------------------------------------------------------------------
   13:  */
   14: 
   15: /*
   16:  *      cpuctrl.c
   17:  *
   18:  *       ARM CPU control
   19:  */
   20: 
   21: #include "sysdepend.h"
   22: 
   23: /*
   24:  * Location of the 1st level page table
   25:  */
   26: EXPORT UW* const        TopPageTable = (UW*)PAGETBL_BASE;
   27: 
   28: /* ------------------------------------------------------------------------ */
   29: /*
   30:  *       cache control
   31:  *       acts on the whole address space.
   32:  */
   33: 
   34: /*
   35:  * turn on cache
   36:  */
   37: EXPORT void EnableCache( void )
   38: {
   39:         setCacheMMU(ENB_CACHEMMU);
   40: }
   41: 
   42: /*
   43:  * turn off cache
   44:  */
   45: EXPORT void DisableCache( void )
   46: {
   47:         // MMU can NOT be turned off with this CPU.
   48:         setCacheMMU(DIS_CACHEONLY);
   49: }
   50: 
   51: /* ------------------------------------------------------------------------ */
   52: /*
   53:  *      processing on monitor entry
   54:  */
   55: 
   56: /*
   57:  * entry
   58:  *       info, return value is meaningless
   59:  */
   60: EXPORT W enterMonitor( UW info )
   61: {
   62:         /* cache and MMU is flushed */
   63:         setCacheMMU(ENB_CACHEMMU);
   64: 
   65:         return 0;
   66: }
   67: 
   68: /*
   69:  * exit
   70:  *       only in the case of system control processor (CP15)
   71:  *       info is the cache and MMU mode
   72:  *       return value is meaningless
   73:  */
   74: EXPORT W leaveMonitor( UW info )
   75: {
   76:         /* restore cache && MMU to the original state. */
   77:         setCacheMMU(info);
   78: 
   79:         return 0;
   80: }
   81: 
   82: /* ------------------------------------------------------------------------ */