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tkernel_2/monitor/hwdepend/tef_em1d/src/waitusec.cbare sourcepermlink (0.01 seconds)

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    1: /*
    2:  *----------------------------------------------------------------------
    3:  *    T-Kernel 2.0 Software Package
    4:  *
    5:  *    Copyright 2011 by Ken Sakamura.
    6:  *    This software is distributed under the latest version of T-License 2.x.
    7:  *----------------------------------------------------------------------
    8:  *
    9:  *    Released by T-Engine Forum(http://www.t-engine.org/) at 2011/05/17.
   10:  *    Modified by TRON Forum(http://www.tron.org/) at 2015/06/01.
   11:  *
   12:  *----------------------------------------------------------------------
   13:  */
   14: 
   15: /*
   16:  *      waitusec.c
   17:  *
   18:  *       EM1-D512: micro wait
   19:  */
   20: 
   21: #include "sysdepend.h"
   22: #include <arm/em1d512.h>
   23: 
   24: LOCAL   UW        delay64us;              // wait for 64 microsec
   25: 
   26: /*
   27:  * wait for nanoseconds
   28:  */
   29: EXPORT  void     waitNsec(_UW nsec)
   30: {
   31:         for (nsec = nsec * delay64us / 64000; nsec > 0; nsec--);
   32: 
   33:         return;
   34: }
   35: 
   36: /*
   37:  * wait for microseconds
   38:  */
   39: EXPORT  void     waitUsec(_UW usec)
   40: {
   41:         for (usec = usec * delay64us / 64; usec > 0; usec--);
   42: 
   43:         return;
   44: }
   45: 
   46: /*
   47:  * wait for milliseconds
   48:  */
   49: EXPORT  void     waitMsec(UW msec)
   50: {
   51:         while (msec-- > 0) waitUsec(1000);
   52: 
   53:         return;
   54: }
   55: 
   56: /* ------------------------------------------------------------------------ */
   57: 
   58: /*
   59:  * setting up the initial count for micro-wait()
   60:  */
   61: EXPORT  void     setupWaitUsec(void)
   62: {
   63:         UW     t0, t1, t2;
   64: 
   65: #define MAX_CNT         (ACPU_CLK * 64 / 10)   // 1 Clock
   66: #define MIN_CNT         (ACPU_CLK * 64 / 1280) // 128 Clock
   67: 
   68:         /* use TI0 timer, and assume clock is PLL3 / 8 */
   69:         out_w(Txx_OP(TI0), 0);                 // Timer stop, count clear
   70:         while (in_w(Txx_RCR(TI0)));
   71: 
   72:         out_w(Txx_SET(TI0), 0xffffffff);       // maximum count
   73:         out_w(Txx_OP(TI0), 0x00000003);                // Timer start
   74: 
   75:         delay64us = 64;
   76:         waitUsec(1000);                                // wait for a while until things settle down
   77: 
   78:         t0 = in_w(Txx_RCR(TI0));
   79:         waitUsec(1000);
   80:         t1 = in_w(Txx_RCR(TI0));
   81:         waitUsec(3000);
   82:         t2 = in_w(Txx_RCR(TI0));
   83: 
   84:         out_w(Txx_OP(TI0),0);                  // Timer stop, count clear
   85:         while (in_w(Txx_RCR(TI0)));
   86:         
   87:         t2 -= t1;      // count for 3000 times
   88:         t1 -= t0;      // count for 1000 times
   89:         t2 -= t1;      // count for 2000 times
   90: 
   91:         /*
   92:          * calculate the count for 64 microsec
   93:          *
   94:          *                    2000 loops x timer clock [MHz] x 64 [microsec]
   95:          *     delay64us = ------------------------------------------------
   96:          *                                      t2
   97:          *
   98:          * * considering the representation of PLL3_CLK (1/1000MHz unit), and setting of pre scaler,
   99:          * it can be written down as follows.
  100:          *
  101:          *                    2 loops x PLL3_CLK [1/1000MHz] x 8 [microsec]
  102:          *     delay64us = -------------------------------------------
  103:          *                                      t2
  104:          *
  105:          */
  106:         delay64us = (t2 == 0) ? MAX_CNT : ((2 * PLL3_CLK * 8) / t2);
  107:         if (delay64us > MAX_CNT) delay64us = MAX_CNT;
  108:         else if (delay64us < MIN_CNT) delay64us = MIN_CNT;
  109: 
  110:         return;
  111: }
  112: