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63: } 64: DSB(); 65: }
45: Asm("mcr p15, 0, %0, cr8, c7, 0":: "r"(0)); 46: DSB(); ISB(); 47: }
36: *PAGETBL_BASE = 0x9402; // Strongly-order, Kernel/RO 37: DSB(); 38: Asm("mcr p15, 0, %0, cr8, cr7, 0":: "r"(0)); // I/D TLB invalidate
254: 255: DSB(); 256: Asm("mcr p15, 0, %0, cr8, c7, 0":: "r"(0)); // I/D TLB invalidate